1. Field of the Invention
This invention relates to a method of aligning substrates to be worked (wafers or the like) used in the manufacture of semiconductors, and in particular to a method of and an apparatus for successively aligning a plurality of areas to be worked formed on a substrate to be worked relative to a predetermined reference position.
2. Related Background Art
In numerous processes, a wafer for the manufacture of a semiconductive element is subjected to an alignment operation of high accuracy as required. Particularly, the alignment of a reticle pattern (a mask pattern) and a pattern on the wafer in the photolithography process is one of important operations which govern the performance of the semiconductive element. Also, where a defect is present in a part of a circuit made on a wafer, alignment of the wafer to a laser light applying position is an important operation in a repair process wherein a fuse provided in advance in the circuit of the wafer is cut by laser light or the connection of wiring is effected in order to re-connect that part to a spare circuit portion.
In the recent photolithography process, the step-and-repeat type exposure using a reduction projection type exposure apparatus is the current trend. The alignment of a wafer in this system is divided broadly into the global alignment system and the each-die alignment system.
The global alignment system is such that the position of a mark preformed on a wafer is detected with the projection point of the pattern of a reticle as the reference, whereafter on the basis of the result of the detection, wafers are successively caused to effect stepping in an arrangement predetermined in design, thereby accomplishing exposure. On the other hand, the each-die alignment system is such that a mark formed in each exposure shot area on a wafer and a mark formed concomitantly with a pattern on a reticle re aligned relative to each other, after which exposure is accomplished, and this alignment is effected at each exposure shot.
Of the above-described two systems, the global alignment system is high in throughput and suitable for mass production because all alignment operations are completed before the exposure of a wafer. Further, position detection is effected with respect to a plurality of marks scattered on the wafer and the correction of all exposure shot positions from the design value is effected on the basis of the mean value of the result of the detection and therefore, there is an advantage that even when the error of the position detection of the alignment marks has great irregularity, the error can be averaged. The each-die alignment system is low in throughput because alignment (mark position detection) is effected at each shot, and suffers from a disadvantage that the error of the mark position detection at each shot directly governs the superposition accuracy at that shot.
At present, the global alignment system is chiefly used in the manufacture of semiconductors, but as the size of wafers becomes larger, the localized shot (chip) arrangement error attributable to the expansion and contraction of wafers is becoming significant. For this reason, development of an alignment method for obtaining high superposition accuracy while minimizing the reduction in throughput is requisite.
However, in the global alignment system according to the prior art, the shot arrangement on a wafer is prescribed on the basis of the result of the alignment at several points on the wafer and therefore, the presence of any localized arrangement error on the wafer has led to a problem that the superposition accuracy in that portion is reduced. This is a problem which may equally arise in the block alignment system which is a modification of the global alignment system. The block alignment system is a method whereby the surface of a wafer is divided into several large block areas and alignment of several points is effected in each block and the shot arrangement in the block is prescribed on the basis of the result of the alignment. Accordingly, the presence of any localized arrangement error has led to the possibility that the superposition error becomes greater with regard to the shot located near the boundary between adjacent blocks.
The above-described problems regarding the alignment of a wafer may also arise in a repair apparatus. Particularly, in the case of a repair apparatus, the alignment is not between the surface of a reticle and the surface of a wafer as in an exposure apparatus, but between a point and a point (a laser spot and a fuse cutting point) and therefore, considerably high accuracy is required of both the global alignment system and the block alignment system. Further, wafers treated in the repair apparatus have been subjected to frequent heat treatments and therefore, the expansion and contraction (distortion) of the wafers themselves is considerable.